Patent · US Active

Determining categories for memory fail conditions

US9401222B1 · kind B1 · utility

2Cited by

16References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Martin Eckert · Metzingen, DE
Nils Schlemminger · Sindelfingen, DE
Otto A. Torreiter · Echterdingen, DE

Key dates

Filing date	Nov 23, 2015
Grant date	Jul 26, 2016
Priority date	—
Expiry date	Nov 23, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG11C2029/5604
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Embodiments of the present invention provide methods, program products, and systems for testing a memory cell arrangement. Embodiments of the present invention can determine categories of memory fail conditions by checking memory cells of with a sequence of test parameter configurations for a malfunction using test parameters, storing for test parameter configurations for which a malfunction is detected, and assigning the respective test parameter configuration with a bit fail count comprising the number of malfunctioning memory cells. Embodiments of the present invention can be used to create a relational data structure representing test parameter configurations and can combine one or more test parameter configurations and can create a representation of the bit fail counts of the respective test parameter configurations.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.