Apparatus and method for processing invalid operation in prologue or epilogue of loop
US9411582B2 · kind B2 · utility
1Cited by
4References
14Claims
0Family size
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Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Oct 19, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7867
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus for processing an invalid operation in a prologue and/or an epilogue of a loop includes a register file including a first region for storing a data validity value indicating whether data is valid or invalid, and a second region for storing the data; and a functional unit configured to determine whether an operation is valid or invalid based on a value of a first region of each of one or more input sources received from the register file, and output a destination including a value based on the value of the first region of each of the input sources.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.