Methods of forming single and double diffusion breaks on integrated circuit products comprised of FinFET devices and the resulting products
US9412616B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 16, 2015 |
| Grant date | Aug 9, 2016 |
| Priority date | — |
| Expiry date | Nov 16, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/797
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One illustrative method disclosed herein includes, among other things, forming a multi-layer patterned masking layer comprised of first and second layers of material and first and second openings that extend through both of the first and second layers of material, wherein the first opening is positioned above a first area of the substrate where the DDB isolation structure will be formed and the second opening is positioned above a second area of the substrate where the SDB isolation structure will be formed. The method also includes performing a first process operation through the first opening to form the DDB isolation structure, performing a second process operation to remove the second layer of material and to expose the first opening in the first layer of material, and performing a third process operation through the second opening to form the SDB isolation structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.