Patent · US Active

Fused multiply add pipeline

US9430190B2 · kind B2 · utility

2Cited by

6References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Son Dao Trong · Stuttgart, DE
Michael Klein · Schenefeld, DE
Christophe J. Layer · Eppelheim, DE
Silvia M. Mueller · Altdorf, DE

Key dates

Filing date	Jan 31, 2014
Grant date	Aug 30, 2016
Priority date	—
Expiry date	Dec 22, 2034

Classification

Technology area (CPC G)Physics
CPC primaryG06F7/5443
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method for operating a fused-multiply-add pipeline in a floating-point unit of a processor is disclosed. A multiplication is initially performed between a first operand and a second operand in a multiplier block to obtain a set of partial product results. The partial product results are sent to a carry-save adder block. A partial product reduction is performed on the partial product results to generate a carry-save result having a sum term and a carry term. The carry-save result is then formatted to generate a carry-out bit. The carry-save result is added to a third operand to generate a final result.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.