Device based wear leveling using intrinsic endurance
US9430322B2 · kind B2 · utility
2Cited by
1References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 2, 2012 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Aug 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0061
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system for improving the management and usage of blocks based on intrinsic endurance may be used to improve memory usage for flash memory, such as a memory card. The overall card endurance may be extended by cycling blocks with higher intrinsic endurance over the lowest endurance target of the worst block. This may be accomplished by managing blocks with different intrinsic endurance values internally or by partitioning the blocks with different intrinsic endurance values externally for different usage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.