Jonathan Hsu
16Patents
5h-index
25Co-inventors
62Inventor score
Filing activity: Dec 10, 2008 → Jan 17, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US8307241B2 | Data recovery in multi-level cell nonvolatile memory | Physics | 26 | Active |
| US8132045B2 | Program failure handling in nonvolatile memory | Physics | 23 | Active |
| US9484098B1 | Smart reread in nonvolatile memory | Physics | 9 | Active |
| US10014060B2 | Memory system and method for reducing read disturb errors | Physics | 7 | Active |
| US8832353B2 | Host stop-transmission handling | Physics | 5 | Active |
| US9626106B2 | System and method for memory command queue management and configurable memory status checking | Physics | 4 | Active |
| US9589645B2 | Block refresh to adapt to new die trim settings | Physics | 3 | Active |
| US8843693B2 | Non-volatile memory and method with improved data scrambling | Physics | 3 | Active |
| US9720612B2 | Biasing schemes for storage of bits in unreliable storage locations | Physics | 2 | Active |
| US8332577B2 | Program control of a non-volatile memory | Physics | 2 | Active |
| US9430322B2 | Device based wear leveling using intrinsic endurance | Electricity | 2 | Active |
| US9830108B2 | Write redirect | Physics | 1 | Active |
| US9875049B2 | Memory system and method for reducing peak current consumption | Emerging Cross-Sectional Technologies | 1 | Active |
| US11156638B2 | Contactors with signal pins, ground pins, and short ground pins | Electricity | 0 | Active |
| US8811081B2 | Systems and methods of updating read voltages in a memory | Physics | 0 | Active |
| US10241704B2 | Biasing schemes for storage of bits in unreliable storage locations | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.