Edge termination for super junction MOSFET devices
US9431249B2 · kind B2 · utility
13Cited by
70References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 1, 2011 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Dec 11, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a Super Junction metal oxide semiconductor field effect transistor (MOSFET) device can include a substrate and a charge compensation region located above the substrate. The charge compensation region can include a plurality of columns of P type dopant within an N type dopant region. In addition, the Super Junction MOSFET can include a termination region located above the charge compensation region and the termination region can include an N− type dopant. Furthermore, the Super Junction MOSFET can include an edge termination structure. The termination region includes a portion of the edge termination structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.