Method and structure for metal gates
US9431304B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2014 |
| Grant date | Aug 30, 2016 |
| Priority date | — |
| Expiry date | Dec 22, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having metal gates and methods of forming the same are disclosed. The method includes receiving a substrate, a dummy gate stack formed over the substrate, and a structure surrounding the dummy gate stack. The method further includes removing the dummy gate stack, resulting in a trench in the structure. The method further includes forming a gate dielectric layer in the trench; forming a barrier layer over the gate dielectric layer; forming an oxide layer over the barrier layer; and forming a work function metal layer over the oxide layer. In embodiments, the method further includes removing the work function metal layer by an etchant containing phosphoric acid, wherein the oxide layer prevents the etchant from etching the barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.