Multi-channel probe plate for semiconductor package test systems
US9435825B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2015 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/67
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test apparatus includes a multi-channel probe plate having an electrically insulating body with opposing first and second main surfaces, and a plurality of spaced apart electrically conductive coupling regions embedded in or attached to the body at the first main surface. Each of the electrically conductive coupling regions is configured to cover a different zone of a semiconductor package when the semiconductor package is positioned in close proximity to the first main surface of the plate. The test apparatus further includes circuitry electrically connected to each of the coupling regions of the probe plate via a different channel. The circuitry is operable to measure a parameter indicative of the degree of capacitive coupling between each electrically conductive coupling region of the probe plate and the zone of the semiconductor package covered by the corresponding electrically conductive coupling region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.