Semiconductor device having hard mask structure and fine pattern and forming method thereof
US9437444B2 · kind B2 · utility
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2References
16Claims
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Key dates
| Filing date | Oct 24, 2013 |
| Grant date | Sep 6, 2016 |
| Priority date | — |
| Expiry date | Oct 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/0337
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes forming a plurality of first hard mask patterns separated by a plurality of trenches on a target layer, forming a plurality of second hard mask patterns filling the plurality of trenches, forming a plurality of first opening units in the plurality of second hard mask patterns, forming a plurality of second opening units in the plurality of first hard mask patterns and forming a plurality of patterns using the plurality of first opening units and the plurality of second opening units, which are transferred by etching the target layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.