Methods for fabricating integrated circuits having device contacts
US9443761B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2014 |
| Grant date | Sep 13, 2016 |
| Priority date | — |
| Expiry date | Jul 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes providing a semiconductor device with a metal silicide electrically coupled thereto. A contact opening exposing the metal silicide is formed to the semiconductor device. A conductive material is deposite within the contact opening to form a contact to the metal silicide while simultaneously forming a contact seam void within the contact. A self-aligned conductive material is deposited within the contact to form a conductive plug that at least partially fills the contact seam void, and a metallization layer is deposited overlying the contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.