Semiconductor structure and method for manufacturing the same
US9455403B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 28, 2015 |
| Grant date | Sep 27, 2016 |
| Priority date | — |
| Expiry date | Aug 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8833
Abstract
A semiconductor structure and a method for manufacturing the same are provided. The semiconductor structure comprises an access device, a dielectric layer, a barrier layer, a first interlayer conductor, a first barrier liner, a second interlayer conductor, a second barrier liner, a memory element and a top electrode layer. The access device has two terminals. The dielectric layer covers the access device. The barrier layer is disposed on the dielectric layer. The first and second interlayer conductors are connected to the two terminals, respectively. The first and second barrier liners are disposed on sidewalls of the first and second interlayer conductors, respectively. The memory element is disposed on the first interlayer conductor. The top electrode layer is disposed on the barrier layer and the memory element and covers the memory element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.