Method for semiconductor device fabrication
US9461144B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2014 |
| Grant date | Oct 4, 2016 |
| Priority date | — |
| Expiry date | Nov 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device is disclosed. The method includes exposing a dummy oxide layer of a gate structure to a vapor mixture comprising NH3 and a fluorine-containing compound at a first temperature, wherein the dummy oxide layer is formed over a substrate and surrounded by a gate spacer that includes a material different from that of the dummy oxide layer. The method further includes rinsing the substrate with a solution containing de-ionized water (DIW) at a second temperature. The method may further include baking the substrate in a chamber heated to a third temperature higher than the first and second temperatures. The exposing, rinsing, and baking steps remove the dummy oxide layer thereby forming an opening in the gate spacer. The method may further include forming a gate stack having a high-k gate dielectric layer and a metal gate electrode in the opening.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.