Confined eptaxial growth for continued pitch scaling
US9472447B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2015 |
| Grant date | Oct 18, 2016 |
| Priority date | — |
| Expiry date | Dec 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/853
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A technique relates to manufacturing a finFET device. A plurality of first and second semiconductor fins are formed on a substrate. Gate stacks are formed on the substrate, each including a gate, a hard mask and an oxide layer. A dielectric spacer layer is deposited. A sacrificial fill material is deposited on the finFET device and planarized. A second hard mask is deposited, a trench area is patterned in the hard mask parallel to the first and second semiconductor fins, and the sacrificial fill material is anisotropically etched to create a trench. A dielectric wall is formed in the trench and the second hard mask and sacrificial fill material are removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.