Contact integration for reduced interface and series contact resistance
US9484251B1 · kind B1 · utility
4Cited by
1References
18Claims
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Key dates
| Filing date | Oct 30, 2015 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Oct 30, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of lightly implanting platinum, iridium, osmium, erbium, ytterbium, dysprosium, and gadolinium in semiconductor material in shallow depths by plasma-immersion ion implantation (PIII) and/or pulsed PIII are provided herein. Methods include depositing a liner layer prior to masking and implanting features to form n-type and p-type semiconductors and implanting materials through the liner layer. Methods are suitable for integration schemes involving fabrication of fin-type field effect transistors (FinFETs).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.