Formation of self-aligned source for split-gate non-volatile memory cell
US9484261B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2014 |
| Grant date | Nov 1, 2016 |
| Priority date | — |
| Expiry date | Sep 5, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A memory device having a pair of conductive floating gates with inner sidewalls facing each other, and disposed over and insulated from a substrate of first conductivity type. A pair of spaced apart conductive control gates each disposed over and insulated from one of the floating gates, and each including inner sidewalls facing each other. A pair of first spacers of insulation material extending along control gate inner sidewalls and over the floating gates. The floating gate inner sidewalls are aligned with side surfaces of the first spacers. A pair of second spacers of insulation material each extend along one of the first spacers and along one of the floating gate inner sidewalls. A trench formed into the substrate having sidewalls aligned with side surfaces of the second spacers. Silicon carbon disposed in the trench. Material implanted into the silicon carbon forming a first region having a second conductivity type.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.