Wafer-level chip-scale package structure utilizing conductive polymer
US9496234B1 · kind B1 · utility
0Cited by
4References
9Claims
0Family size
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Key dates
| Filing date | Jun 17, 2015 |
| Grant date | Nov 15, 2016 |
| Priority date | — |
| Expiry date | Jun 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated conductive polymer-solder ball structure is provided. The integrated conductive polymer-solder ball structure comprises a sputter seed layer applied to a wafer structure, one or more conductive polymer pad structures applied to the sputtered seed layer at locations on the wafer structure where one or more solder ball structures will be formed, an electroplating layer applied to portions of the one or more conductive polymer pad structures where a photoresist layer has been exposed, and a solder ball formed on each of the electroplating layers thereby forming the one or more solder ball structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.