System and method to reset a lock indication
US9501332B2 · kind B2 · utility
1Cited by
20References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2012 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | Sep 6, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus include a first core processor, a second core processor, and a lock register coupled to the first core processor and to the second core processor. The apparatus further includes a shared structure responsive to the first core processor and to the second core processor. The shared structure is responsive to an unlock instruction issued by either the first core processor or the second core processor to send a signal to the lock register to reset a lock indication in the lock register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.