Composite views for IP blocks in ASIC designs
US9501607B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2015 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | Jun 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing device for a generating composite view for an intellectual property (IP) core may obtain constraints for multiple application specific integrated circuits (ASIC) designs in which the IP core is used; and determine composite constraints for the IP core based on the constraints for the multiple ASIC designs. The composite constraints may be within all constraints for the multiple ASIC designs. A freedom of change to update the particular IP core may be identified based on the composite constraints.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.