Method for manufacturing semiconductor device with a barrier layer having overhung portions
US9502303B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2015 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | Apr 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0193
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing a semiconductor device is provided. A substrate with an insulation formed thereon is provided, wherein the insulation has plural trenches, and the adjacent trenches are spaced apart from each other. A barrier layer is formed on an upper surface of the insulation and in sidewalls of the trenches, and the barrier layer comprises overhung portions corresponding to the trenches. A seed layer is formed on the barrier layer. Then, an upper portion of the seed layer formed on an upper surface of the barrier layer is removed. An upper portion of the barrier layer is removed for exposing the upper surface of the insulation. Afterwards, the conductors are deposited along the seed layer for filling up the trenches, wherein the top surfaces of the conductors are substantially aligned with the upper surface of the insulation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.