Method for producing a field effect transistor including forming a gate after forming the source and drain
US9502566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2014 |
| Grant date | Nov 22, 2016 |
| Priority date | — |
| Expiry date | Sep 23, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention concerns a method for producing a transistor. The gate of the transistor is produced after having produced source and drain electrodes of the transistor. From a substrate having a stack of layers comprising at least two surface layers with a first layer of a first semiconductor material intended to produce a conduction channel of the transistor, and a second layer of a second semiconductor material situated on the first layer and intended to at least partly produce the source and drain electrodes of the transistor, the formation of a mask defining a cavity of a gate pattern and the creation of lateral recesses at the periphery of the gate pattern in the second layer and under the mask by an isotropic etching of the second material, and in that it comprises a filling of the lateral recesses with a dielectric material so as to form gate spacers therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.