Patent · US Active

Method and apparatus to protect a wafer edge

US9508659B2 · kind B2 · utility

0Cited by

1References

17Claims

0Family size

Assignee

TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

Chen-Fa Lu
Yeur-Luen Tu · Taichung, TW
Shu-Ju Tsai · Tainan, TW
Cheng-Ta Wu · Dingshanjiao, TW
Chia-Shiung Tsai · Jinshanmian, TW
Xiaomeng Chen · Hsinchu, TW

Key dates

Filing date	Jul 1, 2013
Grant date	Nov 29, 2016
Priority date	—
Expiry date	Jan 15, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method includes holding bonded wafers by a wafer holding module. A gap between the bonded wafers along an edge is filled with a protection material.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.