Unidirectional spacer in trench silicide
US9514992B2 · kind B2 · utility
0Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 7, 2015 |
| Grant date | Dec 6, 2016 |
| Priority date | — |
| Expiry date | May 7, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
Abstract
A semiconductor device includes a trench region in an interconnect level dielectric layer. A silicide layer is on the bottom of the trench region. Opposing minor sides of the trench region include a spacer layer, but the central portion of the trench region is substantially free from the spacer layer. The spacer layer is formed using an angled gas cluster ion beam.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.