Semiconductor package and fabrication method thereof
US9520304B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 7, 2013 |
| Grant date | Dec 13, 2016 |
| Priority date | — |
| Expiry date | Nov 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fabrication method of a semiconductor package is disclosed, which includes the steps of: providing a semiconductor structure having a carrier, a circuit portion formed on the carrier and a plurality of semiconductor elements disposed on the circuit portion; disposing a lamination member on the semiconductor elements; forming an insulating layer on the circuit portion for encapsulating the semiconductor elements; and removing the carrier. The lamination member increases the strength between adjacent semiconductor elements so as to overcome the conventional cracking problem caused by a CTE mismatch between the semiconductor elements and the insulating layer when the carrier is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.