Dual program state cycling algorithms for resistive switching memory device
US9524777B1 · kind B1 · utility
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6References
20Claims
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Key dates
| Filing date | Mar 16, 2016 |
| Grant date | Dec 20, 2016 |
| Priority date | — |
| Expiry date | Mar 16, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of controlling a resistive switching memory cell can include: receiving a first command to be executed on the resistive switching memory cell; performing, in response to the first command, an erase operation to erase the resistive switching memory cell to an erased state; verifying the erased state of the resistive switching memory cell; performing a weak program operation to program the resistive switching memory cell to a first programmed state; and verifying the first programmed state of the resistive switching memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.