Method and structure to suppress finFET heating
US9530684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2016 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Jun 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/834
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide structures and methods for heat suppression in finFET devices. Fins are formed in a semiconductor substrate. A graphene layer is formed on a lower portion of the sidewalls of the fins. A shallow trench isolation region is disposed on the structure and covers the graphene layer, while an upper portion of the fins protrudes from the shallow trench isolation region. The graphene layer may also be deposited on a top surface of the base semiconductor substrate. The graphene serves to conduct heat away from the fins more effectively than other dielectric materials.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.