Method of manufacturing non-volatile memory having SONOS memory cells
US9530783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 3, 2015 |
| Grant date | Dec 27, 2016 |
| Priority date | — |
| Expiry date | Jun 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A method for manufacturing a non-volatile memory with SONOS memory cells, which includes steps of: providing a substrate; forming a first gate oxide layer and a first gate conductive layer onto the substrate; forming a MOS transistor gate by executing a photolithography process on the first gate conductive layer, and then forming an ONO structure on the substrate; and forming a second gate conductive layer on the ONO substrate, and then forming a NVM transistor gate by executing a photolithography process on the second gate conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.