In-situ support structure for line collapse robustness in memory arrays
US9543139B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2014 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Jun 18, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for preventing line collapse during the fabrication of NAND flash memory and other microelectronic devices that utilize closely spaced device structures with high aspect ratios are described. In some embodiments, one or more mechanical support structures may be used to provide lateral support between closely spaced device structures to prevent collapsing of the closely spaced device structures during an etching process (e.g., during a word line etch). In one example, during fabrication of a NAND flash memory, one or more mechanical support structures may be in place prior to performing a high aspect ratio word line etch or may be formed during the word line etch. In some cases, the one or more mechanical support structures may comprise portions of an inter-poly dielectric (IPD) layer that were in place prior to performing the word line etch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.