Method of forming patterned hard mask layer
US9543408B1 · kind B1 · utility
0Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 26, 2015 |
| Grant date | Jan 10, 2017 |
| Priority date | — |
| Expiry date | Aug 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/54453
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a patterned hark mask layer includes the following steps. A semiconductor substrate is provided. An amorphous silicon layer is formed on the semiconductor substrate. An implantation process is performed on the amorphous silicon layer. An annealing treatment is performed on the amorphous silicon layer after the implantation process. A patterned hard mask layer is formed on the amorphous silicon layer after the annealing treatment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.