Word line look ahead read for word line to word line short detection
US9548129B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 21, 2015 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Oct 21, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques are provided for operating a memory device which detect word line short circuits, such as short circuits between adjacent word lines. In an example implementation, during a programming operation, the number of program loops used to complete programming or reach another programming milestone for WLn are counted. If the number of program loops exceeds a loop count limit, the memory cells of WLn+1 are evaluated to determine whether a short circuit is present. The evaluation involves a read operation which counts erased state memory cells in the upper tail of the Vth distribution of WLn+1. If the count exceeds a bit count limit, it is concluded that a short circuit exits between WLn and WLn+1, and a corrective action is taken. The loop count limit is adjusted lower as the number of program-erase cycles increases.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.