Inventor · Fremont, CA, US

Jagdish Sabde

23Patents
7h-index
21Co-inventors
58Inventor score

Filing activity: Jul 10, 2014 → Apr 17, 2018

Most-cited inventions

PatentTitleAreaCited byStatus
US9881929B1 Multi-tier memory stack structure containing non-overlapping support pillar structures and method of making thereof Electricity 73 Active
US9934872B2 Erase stress and delta erase loop count methods for various fail modes in non-volatile memory Physics 41 Active
US9449698B1 Block and zone erase algorithm for memory Physics 28 Active
US9449694B2 Non-volatile memory with multi-word line select for defect detection operations Physics 14 Active
US9202593B1 Techniques for detecting broken word lines in non-volatile memories Physics 11 Active
US9548129B2 Word line look ahead read for word line to word line short detection Physics 10 Active
US9224502B1 Techniques for detection and treating memory hole to local interconnect marginality defects Physics 9 Active
US9269446B1 Methods to improve programming of slow cells Physics 7 Active
US9564219B2 Current based detection and recording of memory hole-interconnect spacing defects Physics 6 Active
US9953717B2 NAND structure with tier select gate transistors Physics 5 Active
US10032524B2 Techniques for determining local interconnect defects Physics 5 Active
US10564861B2 Parity relocation for reducing temperature throttling Emerging Cross-Sectional Technologies 3 Active
US9530514B1 Select gate defect detection Physics 2 Active
US9653175B2 Determination of word line to word line shorts between adjacent blocks Physics 2 Active
US9496040B2 Adaptive multi-page programming methods and apparatus for non-volatile memory Physics 1 Active
US9484086B2 Determination of word line to local source line shorts Physics 1 Active
US10290354B1 Partial memory die Physics 1 Active
US9514835B2 Determination of word line to word line shorts between adjacent blocks Physics 1 Active
US10242750B2 High-speed data path testing techniques for non-volatile memory Physics 1 Active
US9460809B2 AC stress mode to screen out word line to word line shorts Physics 0 Active
US9240249B1 AC stress methods to screen out bit line defects Physics 0 Active
US9830998B2 Stress patterns to detect shorts in three dimensional non-volatile memory Electricity 0 Active
US10776277B2 Partial memory die with inter-plane re-mapping Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.