Non-volatile memory with prior state sensing
US9548130B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 4, 2015 |
| Grant date | Jan 17, 2017 |
| Priority date | — |
| Expiry date | Aug 4, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory system comprises a plurality of memory cells arranged in a three dimensional structure and one or more control circuits in communication with the memory cells. The one or more control circuits are configured to program and verify programming for the memory cells. The verifying programming of the plurality of memory cells includes verifying programming for a first data state using a verify operation for a second data state. In one embodiment, the one or more control circuits are also configured to sense whether different memory cells of the plurality of memory cells are in different data states by applying different bit line voltages to the different memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.