Semiconductor devices and methods of fabricating the same
US9559112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2014 |
| Grant date | Jan 31, 2017 |
| Priority date | — |
| Expiry date | Aug 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/694
Abstract
A method of fabricating a semiconductor memory device includes forming a mold stack on a substrate and the mold stack including first sacrificial layers and second sacrificial layers alternately stacked on the substrate. The method also includes forming a plurality of vertical channels that penetrate the mold stack and that contact the substrate, patterning the mold stack to form word line cuts between the vertical channels, the word line cuts exposing the substrate, removing one of the first and second sacrificial layers to form recessed regions in the mold stack, forming a data storage layer, at least a portion of the data storage layer being formed between the vertical channels and the gates, forming gates in the recessed regions, forming air gaps between the gates by removing the other of the first and second sacrificial layers, and forming an insulation layer pattern in the word line cuts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.