Methods of forming stacked microelectronic dice embedded in a microelectronic substrate
US9564400B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2016 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present description include stacked microelectronic dice embedded in a microelectronic substrate and methods of fabricating the same. In one embodiment, at least one first microelectronic die is attached to a second microelectronic die, wherein an underfill material is provided between the second microelectronic die and the at least one first microelectronic die. The microelectronic substrate is then formed by laminating the first microelectronic die and the second microelectronic die in a substrate material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.