Strained isolation regions
US9564488B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2014 |
| Grant date | Feb 7, 2017 |
| Priority date | — |
| Expiry date | Apr 29, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/601
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an isolation trench having localized stressors is provided. In accordance with embodiments of the present invention, a trench is formed in a substrate and partially filled with a dielectric material. In an embodiment, the trench is filled with a dielectric layer and a planarization step is performed to planarize the surface with the surface of the substrate. The dielectric material is then recessed below the surface of the substrate. In the recessed portion of the trench, the dielectric material may remain along the sidewalls or the dielectric material may be removed along the sidewalls. A stress film, either tensile or compressive, may then be formed over the dielectric material within the recessed portion. The stress film may also extend over a transistor or other semiconductor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.