Patent · US Active

Testing fuse configurations in semiconductor devices

US9568544B2 · kind B2 · utility

2Cited by

148References

17Claims

0Family size

Assignee

Rambus Inc. · US

Inventors

Adrian E. Ong · Pleasanton, US
Paul Fuller · Ketchum, US
Nick van Heel · Eagle, US
Mark R. Thomann · Boise, US

Key dates

Filing date	Apr 10, 2014
Grant date	Feb 14, 2017
Priority date	—
Expiry date	Jul 11, 2034

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2224/48145
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A system includes a first integrated circuit configured to operate in at least a normal mode and a test mode and a second integrated circuit, where both the first integrated circuit and the second integrated circuit are disposed within a same semiconductor device package. The system further includes a first terminal, external to the semiconductor device package, electronically coupled to the first integrated circuit and the second integrated circuit. The first terminal is electronically coupled to a buffer in the second integrated circuit and used to convey signals to or from the first integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.