Inventor · Ketchum, ID, US

Paul Fuller

17Patents
6h-index
14Co-inventors
63Inventor score

Filing activity: Oct 7, 1996 → Feb 24, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US6889357B1 Timing calibration pattern for SLDRAM Electricity 58 Expired
US5966388A High-speed test system for a memory device Physics 48 Expired
US6154860A High-speed test system for a memory device Physics 42 Expired
US6550026B1 High speed test system for a memory device Physics 30 Expired
US6055611A Method and apparatus for enabling redundant memory Physics 17 Expired
US8063650B2 Testing fuse configurations in semiconductor devices Electricity 7 Active
US5783948A Method and apparatus for enhanced booting and DC conditions Electricity 6 Expired
US5945845A Method and apparatus for enhanced booting and DC conditions Electricity 4 Expired
US7305509B2 Method and apparatus for zero stub serial termination capacitor of resistor mounting option in an information handling system Emerging Cross-Sectional Technologies 3 Expired
US9568544B2 Testing fuse configurations in semiconductor devices Electricity 2 Active
US8717052B2 Testing fuse configurations in semiconductor devices Electricity 1 Active
US11962674B2 MIPI translation in gigabit multimedia serial link Electricity 0 Active
US11009548B2 Testing fuse configurations in semiconductor devices Electricity 0 Active
US7370253B2 Apparatus and method for high-speed SAS link protocol testing Electricity 0 Active
US11595504B2 MIPI translation in GMSL tunnel mode Electricity 0 Active
US10302696B2 Testing fuse configurations in semiconductor devices Electricity 0 Active
US7613965B2 Apparatus and method for high-speed SAS link protocol testing Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.