Method and apparatus for performing fast incremental physical design optimization
US9569574B1 · kind B1 · utility
22Cited by
5References
19Claims
0Family size
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Key dates
| Filing date | Mar 7, 2014 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Nov 27, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/06
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for designing a system on a target device includes generating a first netlist for a first version of the system after performing synthesis in a first compilation. Optimizations are performed on the first version of the system during placement and routing in the first compilation resulting in a second netlist. A third netlist is generated for a second version of the system after performing synthesis in a second compilation. A hybrid netlist is generated from the first, second, and third netlists. Incremental placement and routing are performed on portions of the hybrid netlist that are new to the first compilation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.