Circuit to improve SRAM stability
US9570155B2 · kind B2 · utility
3Cited by
6References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Jun 9, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Approaches for stability of cells in a Static Random Access Memory (SRAM) array are provided. A circuit includes a precharging circuit configured to precharge bitlines of a Static Random Access Memory (SRAM) array to a first voltage potential for a non-read operation and to a second voltage potential for a read operation. The first voltage potential is different than the second voltage potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.