Method of manufacturing semiconductor package including forming a recessed region in a substrate
US9570368B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Sep 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor package includes forming a passivation layer over a semiconductor substrate. The semiconductor substrate includes a first chip region, a second chip region and a scribe line region. The scribe line region is positioned between the first chip region and the second chip region. The method also includes forming a bump over the passivation layer on at least one of the first chip region and the second chip region. The method further includes removing a portion of the passivation layer to form a groove in the passivation layer on the scribe line region. The method additionally includes filling the groove with a molding compound layer. The molding compound layer is filled to a point that entirely fills the groove, covers the passivation layer, and covers a lower portion of the bump. The method also includes separating the first chip region from the second chip region along the scribe line region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.