Multilevel memory stack structure with joint electrode having a collar portion and methods for manufacturing the same

US9570463B1 · kind B1 · utility

Assignee

• Sandisk Technologies, Inc. · US

Inventors

• Yanli Zhang · San Jose, US
• Raghuveer S. Makala · Campbell, US
• Jin Liu · San Jose, US
• Murshed Chowdhury · Fremont, US
• Yao-Sheng Lee · Tampa, US
• Johann Alsmeier · San Jose, US

Key dates

• Filing date: Oct 15, 2015
• Grant date: Feb 14, 2017
• Expiry date: Oct 15, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/025

Abstract

A three-dimensional memory device including multiple stack structures can be formed with a joint region electrode, which is an electrode formed at a joint region located near the interface between an upper stack structure and a lower stack structure. A memory stack structure is formed through the multiple stack structures. The joint region electrode laterally surrounds a portion of the memory stack structure in proximity to the interface between different stack structures. The joint region electrode includes a layer portion having a thickness and a collar portion that laterally surrounds the memory stack structure and having a greater vertical extent than the thickness of the layer portion. The increased vertical extent of the collar portion with respect to the vertical extent of the layer portion provides enhanced control of a portion of a semiconductor channel in the memory stack structure located near the interface between different stack structures.