Crystalline multiple-nanosheet strained channel FETs and methods of fabricating the same
US9570609B2 · kind B2 · utility
48Cited by
34References
20Claims
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Key dates
| Filing date | Jun 3, 2015 |
| Grant date | Feb 14, 2017 |
| Priority date | — |
| Expiry date | Jun 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A field effect transistor includes a body layer having a strained crystalline semiconductor channel region, and a gate stack on the channel region. The gate stack includes a crystalline semiconductor gate layer that is lattice mismatched with the channel region, and a crystalline gate dielectric layer between the gate layer and the channel region. Related devices and fabrication methods are also discussed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.