Semiconductor package including conductive carrier coupled power switches
US9576887B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2013 |
| Grant date | Feb 21, 2017 |
| Priority date | — |
| Expiry date | Sep 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one implementation, a semiconductor package including conductive carrier coupled power switches includes a first vertical FET in a first active die having a first source and a first gate on a source side of the first active die and a first drain on a drain side of the first active die. The semiconductor package also includes a second vertical FET in a second active die having a second source and a second gate on a source side of the second active die and a second drain on a drain side of the second active die. The semiconductor package includes a conductive carrier attached to the source side of the first active die and to the drain side of the second active die, the conductive carrier coupling the first source to the second drain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.