Integrated circuit devices including FinFETs and methods of forming the same
US9583590B2 · kind B2 · utility
0Cited by
26References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2015 |
| Grant date | Feb 28, 2017 |
| Priority date | — |
| Expiry date | Apr 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming a finFET are provided. The methods may include forming a fin-shaped channel region including indium (In) on a substrate, forming a deep source/drain region adjacent to the channel region on the substrate and forming a source/drain extension region between the channel region and the deep source/drain region. Opposing sidewalls of the source/drain extension region may contact the channel region and the deep source/drain region, respectively, and the source/drain extension region may include InyGa1−yAs, and y is in a range of about 0.3 to about 0.5.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.