Fin cut enabling single diffusion breaks
US9589845B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2016 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | May 23, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided for forming a fin cut that enables a single diffusion break in very dense CMOS structures formed using bulk semiconductor substrates. A dummy gate is removed from a finned structure to expose the top regions of the fins, the bottom fin regions being within a shallow trench isolation region. Selective vapor phase etching follows sequential ion implantation of the top and bottom fin regions to form a diffusion break cut region. The non-implanted regions of the substrate and the shallow trench isolation region remain substantially intact during each etching procedure. Double diffusion break cut regions are also enabled by the method.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.