Static random access memory
US9589966B2 · kind B2 · utility
5Cited by
1References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 2015 |
| Grant date | Mar 7, 2017 |
| Priority date | — |
| Expiry date | Jun 29, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/10
Abstract
A static random access memory (SRAM) is disclosed. The SRAM includes a plurality of SRAM cells on a substrate, in which each of the SRAM cells comprises: a gate structure on the substrate; a first interlayer dielectric (ILD) layer around the gate structure; a first contact plug in the first ILD layer; a second ILD layer on the first ILD layer; and a second contact plug in the second ILD layer and electrically connected to the first contact plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.