Semiconductor die assembly
US9601374B2 · kind B2 · utility
3Cited by
6References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2015 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Apr 17, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18161
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor die assembly having a solderball wirebonded to a substrate. As an example, the semiconductor die assembly may include the solderball attached to a bond pad on a face surface of a memory die. A non-face surface of the memory die can be attached to the substrate. A wire can be wirebonded to the solderball at a first end of the wire and connected to the substrate at a second end of the wire.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.