Dielectric/metal barrier integration to prevent copper diffusion
US9601431B2 · kind B2 · utility
2Cited by
6References
1Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 5, 2014 |
| Grant date | Mar 21, 2017 |
| Priority date | — |
| Expiry date | Jan 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnect structure for use in semiconductor devices and a method for fabricating the same is described. The method includes positioning a substrate in a vacuum processing chamber. The substrate has an exposed copper surface and an exposed low-k dielectric surface. A metal layer is formed over the copper surface but not over the low-k dielectric surface. A metal-based dielectric layer is formed over the metal layer and the low-k dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.