Patent · US Active

Scan flip-flop circuit with dedicated clocks

US9606177B2 · kind B2 · utility

9Cited by

4References

20Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Daniel W. Bailey · Portsmouth, GB
Abhishek A. Sharma · Hillsboro, US
Michael Q. Co · Austin, US

Key dates

Filing date	May 19, 2015
Grant date	Mar 28, 2017
Priority date	—
Expiry date	May 19, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG01R31/318552
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

In one form, a scan flip-flop includes a clock gating cell and a dedicated clock flip-flop. The clock gating cell provides an input clock input signal as a scan clock signal when a scan shift enable signal is active, and provides the input clock signal as a data clock signal when the scan shift enable signal is inactive. The dedicated clock flip-flop stores a data input signal and provides the data input signal, so stored, as a data output signal in response to transitions of the data clock signal, and stores a scan data input signal and provides the scan data input signal, so stored, as the data output signal in response to transitions of the scan clock signal. The clock gating cell may further provide the input clock signal as the data clock signal when both a scan shift enable signal is inactive and a data enable signal is active.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.