BULEX contacts in advanced FDSOI techniques
US9608112B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2015 |
| Grant date | Mar 28, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/201
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides, in accordance with some illustrative embodiments, a method of forming a semiconductor device, the method including providing an SOI substrate with an active semiconductor layer disposed on a buried insulating material layer, which is in turn formed on a base substrate material, forming a gate structure on the active semiconductor layer in an active region of the SOI substrate, partially exposing the base substrate for forming at least one bulk exposed region after the gate structure is formed, and forming a contact structure for contacting the at least one bulk exposed region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.